Dynamic circuits are circuits designed for high speed logic gates. The intent for such circuits is typically to achieve the fastest switching speed available with the lowest possible power consumption. Dynamic circuits have been implemented in bulk complementary metal-oxide semiconductor (CMOS) in order to take advantage of the speed and power benefits of CMOS. Recent advances in integrated circuit technology have shown the speed and power advantages of SOI-based integrated circuits. FIG. 1A is a cross-section view of CMOS device 100. P-type body/substrate 101 includes two n-type wells, source 102 and drain 103. Gate terminal 104, along with source 102 and drain 103 form the CMOS field effect transistor (CMOSFET). In operation, a large capacitance typically forms between source 102 and body/substrate 101 and between drain 103 and body/substrate 101. This capacitance not only delays the switching speed, but also contributes to added power consumption.
FIG. 1B is a cross-section view of SOI device 105. SOI device 105 includes n-type source 109, gate terminal 111, p-type substrate 106, and n-type drain 110. However, unlike bulk CMOS device 100, oxide layer 107 isolates source 109 and drain 110 from body 108. Because the source-to-body and drain-to-body junctions are isolated, there is not as much junction capacitance formed in SOI device 105 as in CMOS device 100. As a result, SOI-based designs are approximately 30% faster than CMOS designs, with a typical 80% reduction in power consumption.
The isolation of the junctions in SOI-based devices results in a body voltage that may float depending on the configuration of the circuit in which the device is included. In comparison, the body voltage in bulk CMOS devices remains more or less constant. The floating body effect in SOI-based technology, therefore, creates problems in the design of dynamic circuits.